SiC semi-superjunction vertical double diffused MOS (VDMOSFET) has higher breakdown voltage than conventional SiC VDMOSFET with the same on-resistance. The ion implantation to form p pillar region on N-type epilayer is a key process to form semi-superjunction stucture. The influences of charge imbalance induced by ion implantation on breakdown voltages of 4H-SiC superjunction and semi-superjunction VDMOSFET are investigated through two-dimensional numerical simulation, and the largest breakdown voltage is obtained when charge imbalance is 30%. With the same structure parameters of devices, when breakdown voltage decreases by 15% due to the deviation of doping concentration in P pillars, the tolerance of doping concentration for the semi-superjunction VDMOSFET is 69.5% higher than for superjunction VDMOSFET which means that less precise process control of ion implantation for semi-superjunction VDMOSFET, will be required with less difficulty in the manufacture of pillars.